Instruction sets
(most recent first)
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Instruction set#7(MMX) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#9(SSE) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#10(SSE2) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#17(SSE3) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#19(SSE4.1) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#42(SSE4.2) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#43(AVX) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#45(BMI1) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#46(F16C) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#20(NX Bit) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#50(SHA) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#11(AMD64/EM64T) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin -
Instruction set#35(VIA Padlock) has been associated toChip family#477(VIA Nano QuadCore (Isaiah)) by Fouquin
Chip families
(most recent first)
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Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toChip family#431(VIA Nano QuadCore (Isaiah II)) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toChip family#476(VIA Nano X2 (Isaiah)) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toChip family#475(VIA Nano (Isaiah)) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toCPU socket#42(NanoBGA2) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#35(VIA Padlock) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#11(AMD64/EM64T) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#50(SHA) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#20(NX Bit) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#46(F16C) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#45(BMI1) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#43(AVX) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#42(SSE4.2) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#19(SSE4.1) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#17(SSE3) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#10(SSE2) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#9(SSE) by Fouquin -
Chip family#477(VIA Nano QuadCore (Isaiah)) has been associated toInstruction set#7(MMX) by Fouquin -
Chip family#477has been inserted by FouquinAttribute Old value New value descriptionnull Improved CNQ stepping "Isaiah" core architecture with added SIMD ... idnull 477 miscSpecsnull Die Size: 2x 66 mm²<br/>Foundry: TSMC<br/>L1 Cache: 128 KB (per core)<br/>L... namenull VIA Nano QuadCore (Isaiah)