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Chip family#439has been inserted by Wolt1xAttribute Old value New value idnull 439 miscSpecsnull namenull Pentium (Westmere-M PGA) -
Chip family#314has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID:
Process node:
Microarchitecture: CPUID:
Process node:
nameCore i3/5/7 (Westmere-M) Core i3/5/7 (Westmere-M PGA) -
Chip family#438has been inserted by Wolt1xAttribute Old value New value idnull 438 miscSpecsnull namenull Celeron (Ivy Bridge Mobile PGA) -
Chip family#437has been inserted by Wolt1xAttribute Old value New value idnull 437 miscSpecsnull namenull Pentium (Ivy Bridge Mobile PGA) -
Chip family#436has been inserted by Wolt1xAttribute Old value New value idnull 436 miscSpecsnull namenull Celeron (Sandy Bridge Mobile PGA) -
Chip family#435has been inserted by Wolt1xAttribute Old value New value idnull 435 miscSpecsnull namenull Pentium (Sandy Bridge Mobile PGA) -
Chip family#317has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID:
Process node:
Microarchitecture: CPUID:
Process node:
nameCore i3/5/7 (Ivy Bridge-M) Core i3/5/7 (Ivy Bridge Mobile PGA) -
Chip family#316has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID:
Process node:
Microarchitecture: CPUID:
Process node:
nameCore i3/5/7 (Sandy Bridge-M) Core i3/5/7 (Sandy Bridge Mobile PGA) -
Chip family#434has been inserted by Wolt1xAttribute Old value New value idnull 434 miscSpecsnull namenull Core i3/5/7 (Ivy Bridge Mobile BGA) -
Chip family#335has been updated by Wolt1xAttribute Old value New value namePentium (Ivy Bridge Embedded) Pentium (Ivy Bridge Mobile BGA) -
Chip family#304has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID:
Process node: 22nm
Microarchitecture: CPUID:
Process node: 22nm
nameCeleron (Ivy Bridge Embedded) Celeron (Ivy Bridge Mobile BGA) -
Chip family#303has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID:
Process node: 32nm
Microarchitecture: CPUID:
Process node: 32nm
nameCeleron (Sandy Bridge Embedded) Celeron (Sandy Bridge Mobile BGA) -
Chip family#432has been updated by Wolt1xAttribute Old value New value namePentium (Sandy Bridge Embedded) Pentium (Sandy Bridge Mobile BGA) -
Chip family#433has been updated by Wolt1xAttribute Old value New value nameCore i3/5/7 (Sandy Bridge Embedded) Core i3/5/7 (Sandy Bridge Mobile BGA) -
Chip family#433has been inserted by Wolt1xAttribute Old value New value idnull 433 miscSpecsnull namenull Core i3/5/7 (Sandy Bridge Embedded) -
Chip family#432has been inserted by Wolt1xAttribute Old value New value idnull 432 miscSpecsnull namenull Pentium (Sandy Bridge Embedded) -
Chip family#431has been inserted by Wolt1xAttribute Old value New value idnull 431 miscSpecsnull namenull VIA Nano Quad (Isaiah II) -
Chip family#430(Centaur CHA) has been associated toCPU socket#172(Centaur LGA2011) by Wolt1x -
Chip family#430(Centaur CHA) has been associated toCPU socket#172(Centaur) by Wolt1x -
Chip family#430(Centaur CHA) has been associated toRAM type#66(DDR4) by Wolt1x -
Chip family#430has been inserted by Wolt1xAttribute Old value New value idnull 430 miscSpecsnull namenull Centaur CHA -
Chip family#227(K10 - Athlon II) has been associated toCPU socket#56(Socket AM3) by fireTwoOneNine -
Chip family#227has been updated by fireTwoOneNineAttribute Old value New value descriptionnull # K10 **AMD K10** is AMD's follow-on CPU architecture to K8. Stric... miscSpecsMicroarchitecture: CPUID: <br/>L1 cache: 64KB code, 64KB data<br/>Process n... Microarchitecture: CPUID: 10h<br/>L1 cache: 64KB code, 64KB data<br/>L2 cac... -
Chip family#72has been updated by fireTwoOneNineAttribute Old value New value miscSpecsMicroarchitecture: CPUID: 10h<br/>L1 cache: 64KB code, 64KB data<br/>L2 cac... Microarchitecture: CPUID: 10h<br/>L1 cache: 64KB code, 64KB data<br/>L2 cac... -
Chip family#72has been updated by fireTwoOneNineAttribute Old value New value miscSpecsMicroarchitecture: CPUID:
L1 cache: 64KB code, 64KB data
Microarchitecture: CPUID: 10h<br/>L1 cache: 64KB code, 64KB data<br/>L2 cac... -
Chip family#404(Xeon (Haswell)) has been associated toEntity documentation#277(Intel Xeon Processor E3-1200 v3 Family News Fact Sheet []) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#276(Intel i960 VH Microprocessor Specification Update [2004-08]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#275(Upgrading Designs from the 3.3 V, 5 V Tolerant 80960JA/JF/JD Embedded Processors to the 80960JT [1998-05]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#274(Intel i960 VH Microprocessor Developer’s Manual (273173-001) [1998-10]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#273(Intel i960 Hx Microprocessor Developer’s Manual (272483-002) [1997-12]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#272(Intel i960 VH Preliminary Datasheet (273179-004) [1999-07]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#271(Intel 80960JA/JF/JD/JS/JC/JT 3.3V Datasheet (273159-006) [2004-08]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#270(Intel i960 Processors Product Brief []) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#269(Intel i960 processors by Part Number and Description [2003-02]) by Wolt1x -
Chip family#270(Pentium II Overdrive (Deschutes)) has been associated toEntity documentation#268(Pentium II Overdrive Installation Manual (696766-001) [1998-05]) by Wolt1x -
Chip family#270has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID: 0: 631 (dB0)<br/><br/>L1 cache: 16KB code, 16KB d... Microarchitecture: CPUID: 631 (dB0)<br/>L1 cache: 16KB code, 16KB data<br/>... -
Chip family#342(i960) has been associated toEntity documentation#267(BIOS Compatibility for i960 Rx I/O Processor [1997-02]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#266(i960 Hx Microprocessor Technical Notes (1.0) [1995-05-31]) by Wolt1x -
Chip family#342(i960) has been associated toEntity documentation#265(Hexadecimal Object File Format Specification [1988-01-06]) by Wolt1x -
Chip family#271(Pentium MMX Overdrive (P55C)) has been associated toEntity documentation#264(Pentium OverDrive With MMX Installation Manual Third Edition (669409-003) [1997-08]) by Wolt1x -
Chip family#271has been updated by Wolt1xAttribute Old value New value miscSpecsMicroarchitecture: CPUID: 0: 543 (xB1)<br/>1: 544 (xA3)<br/><br/>L1 cache: ... Microarchitecture: CPUID: 543 (xB1),544 (xA3)<br/>L1 cache: 16KB code, 16KB... -
Chip family#93(Core 2 Quad (Kentsfield)) has been associated toEntity documentation#263(Intel Core 2 Quad Installation Instructions [2007-11-08]) by Wolt1x -
Chip family#95(Core 2 Quad (Yorkfield)) has been associated toEntity documentation#262(Intel Core 2 Quad Installation Instructions [2007-11-08]) by Wolt1x -
Chip family#95(Core 2 Quad (Yorkfield)) has been associated toEntity documentation#261(Intel Core 2 Quad Processor Q9000 Series Export Compliance Metrics [2011-09-08]) by Wolt1x -
Chip family#95(Core 2 Quad (Yorkfield)) has been associated toEntity documentation#260(Intel Core 2 Quad Processor Q8000 Series Export Compliance Metrics [2011-09-08]) by Wolt1x -
Chip family#93(Core 2 Quad (Kentsfield)) has been associated toEntity documentation#259(Intel Core 2 Quad Processor Q6000 Series Export Compliance Metrics [2011-09-08]) by Wolt1x -
Chip family#206(Core 2 Extreme (Yorkfield)) has been associated toEntity documentation#258(Intel Core 2 Extreme Installation Instructions [2007-10-30]) by Wolt1x -
Chip family#100(Core 2 Extreme (Kentsfield)) has been associated toEntity documentation#257(Intel Core 2 Extreme Installation Instructions [2007-10-30]) by Wolt1x -
Chip family#206(Core 2 Extreme (Yorkfield)) has been associated toEntity documentation#256(Intel Core 2 Extreme Processor QX9000 Series Export Compliance Metrics [2011-09-08]) by Wolt1x -
Chip family#100(Core 2 Extreme (Kentsfield)) has been associated toEntity documentation#255(Intel Core 2 Extreme Processor QX6000 Series Export Compliance Metrics [2011-09-08]) by Wolt1x
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