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Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... Cache Hierarchy: CU Local Data Share (GCN-Mode): 64 KB<br/>CU Vector Data C... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... Cache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... Cache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... Cache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... Cache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L0 Cache: 32 KB per WGP<br/>L1 Cache: 128 KB per Array<br/... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L1 Cache (per SM): 64 KB<br/>L2 Cache (Shared): 384 KB<br/... -
Chip#10888has been updated by RigoAttribute Old value New value miscSpecsCache Hierarchy: L1 Cache (per SM): 64 KB<br/>L2 Cache (Shared): 384 KB<br/... -
Chip#10888(AMD 215-0929036 (Navi 12 GLXL)) has been associated toChip image#6684by Rigo -
Chip#10888has been inserted by RigoAttribute Old value New value idnull 10888 manufacturernull AMD miscSpecsnull namenull Navi 12 GLXL partNumbernull 215-0929036 processNodenull 7 sortnull 1 tdpnull 150 typenull Video