       IBM Netfinity 5000 POST/BIOS Flash Diskette
                    Version 1.22
               Installation README File


This README file contains the latest information about installing
the IBM Netfinity 5000 POST/BIOS.


CONTENTS
________

1.0  Updating IBM Netfinity 5000 POST/BIOS
2.0  Version Changes
3.0  Trademarks and Notices


1.0  Updating IBM Netfinity 5000 POST/BIOS
______________________________________________

The procedure to update the POST/BIOS is as follows:

   1. Insert the "IBM Netfinity 5000 POST/BIOS Flash Diskette"
      into drive A.

   2. Start up or restart your IBM Netfinity 5000 server.

   3. The system will boot off of the diskette and present
      a window which allows you the option to flash various
      options.  Choose "1 - Update POST/BIOS".

   4. You will then be asked if you would like to save the current
      code to a diskette.  If you select 'Y', you need to have
      a formatted diskette already available.

   5. At this point, the image will be loaded from the diskette, and
      you will be asked to choose which language you wish to use during
      POST and in Setup.  If you select a choice other than English,
      the selected language will be merged into the image.
      There is also an option to Quit the flash update on this menu.

   6. After this completes the system will update the flash ROM
      with the new code.  When this is complete you will be prompted
      to remove the diskette and hit return to reboot the system.



2.0  Version Changes
____________________
1.22   New Release 
 - Fix for new IBM ServeRaid Apadater
 
1.21   New Release 
 - The ability to enable or disable the visibility of the processor
   serial number through the Setup Program has been restored.
 - Fix for CMOS UTILITY                             
 - Add support for Coppermine C0                                  
 - Cargill flash changes                                          
 - Bootix fix          

1.20    New release

- Fixes for AIC7895 adaptec.
- Added support for B0 coppermine processors.

1.15

- Setup replication changes to Flash Utility for diags.
- System summary help line items fixed.
- Correction to changes made for non cd boot of Win2000.

1.14

- Refesh rate values changed.

1.13

- Fixes for remote POST
- Windows 2000 install fix
- Support for 256Mbit memory
- 4690 store systems support

1.12

- Fix for ServeRaid adapter reset problem.

1.11

- PCI SERR not logging correct info
- Certain security option cards fail to hook int 19h
- Add support for Novell ICS boot CD
- Add Coppermine support

1.10

- Fix PCI bus error LED
- Remote POST faster
- DIMM LED behavior in-line with other servers
- Fix POP equals PAP bug
- Fix disappearing i9990301 message
- 4690 store systems won't dump
- New Processor patches
- ECC test not flagging 1295 error

1.09

- ACPI update for Mohican 600
- Update DMIBIOS to reflect 600Mhz maximum processor  speed

1.08

- ACPI update to correct IOAPIC entries.

1.07

- ISA VGA support.
- Zero memory between 480 and 640k.
- Setup item to enable / disable boot fail check.
- Update flash code to support new Intel device.

1.06

- New patch file for C0 step Pentium III
- Fix VPD save problem

1.05

- Unreported I/O fix
- Not flushing data from SP data port
- S3 SSVID Update
- RS485 Updates for remote flash
- Diags Flash fix KYBD Emulator
- Support for multiple PCI video adapters
- Fix DMI invalid handle error
- Remove beeps from remote flash update
- Reintroduce A1 Step Processor support

1.04

- Fix intermittent hang during SMI install
- Fix intermittent hang during autoconfig
- AMD reset fix - pass 9 planars
- Turn off memory prefetch
- Final ACPI code implemented
- Fix support for video in 2nd PCI bus with new chipset rev

1.03

- Add support for Katmai processors
- Add support for remote bootblock recovery
- Add menu to allow PCI Master Write Streaming to be disabled for debug purposes
- Add bug fix for failed RIPL boots.
- Modified VID detection to take account of pass 8 or 9 planar.

1.02

- Fixed support for Artic and 5250 adapters.
- Added error handling for VRM fails.
- Modified SMI action table to put clock synchronisation at the end.
- Added setup option to support PCI 2.1 non compliant adapters.

1.01

- Bypass clock synchronisation when service processor busy

-------  ------------------------
1.00     First release - BIOS level 1.

- Fixed update of editable VPD information
- Fixed reporting of POST halt to service processor
- Removed some core chipset setup items and fixed some setup screen
  corruption


3.0  Trademarks and Notices
___________________________

THIS DOCUMENT IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY
KIND. IBM DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS OR
IMPLIED, INCLUDING WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF FITNESS FOR A PARTICULAR PURPOSE AND
MERCHANTABILITY WITH RESPECT TO THE INFORMATION IN THIS
DOCUMENT. BY FURNISHING THIS DOCUMENT, IBM GRANTS NO LICENSES
TO ANY PATENTS OR COPYRIGHTS.

Note to U.S. Government Users -- Documentation related to restricted
rights -- Use, duplication or disclosure is subject to restrictions
set forth in GSA ADP Schedule Contract with IBM Corp.
