VIA Nano QuadCore (Isaiah)
None
- AES
- AMD64/EM64T
- AVX
- BMI1
- Extended MMX
- F16C
- NX Bit
- SHA
- SSE
- SSE2
- SSE3
- SSE4.1
- SSE4.2
- SSSE3
- VIA Padlock
| Microarchitecture | |
|---|---|
| CPUID | |
| Foundry | TSMC |
| Die Size | 2x 66 mm² |
| L1 Cache | 128 KB (per core) |
| L2 Cache | 1 MB (per core) |
| Process Size | 40 nm |
Release date
File
Logs
Improved CNQ stepping "Isaiah" core architecture with added SIMD instructions. CNQ stepping Nano QuadCore processors are MCM consisting of two physical Nano X2 dies per package linked through the northbridge / VIA V4 front side bus.
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