Loongson LS3C5000
Logs
TypeProcessor
Not linked to any boards or cards.
| Specifications | |
|---|---|
| Cache | Each core contains a 64KB private level-1 instruction cache and 64KB private level-1 data cache; Each core contains 256KB of private second-level cache; Total 32MB Level 3 cache |
| Frequency | 2.0GHz – 2.2GHz |
| Other I/O | 1 SPI, 1 UART, 3 I2C, 16 GPIO interfaces |
| High-speed I/O | 1 HyperTransport 3.0 IO interface (HT0); 3 conformance interconnect high-speed interfaces (HT1, HT2, HT3) |
| Number of cores | 16 |
| Processor cores | 64-bit superscalar processor core LA464; Support for the LoongArch ® instruction set; Support 128/256-bit vector instructions; Four launches are executed out of order; 4 fixed-point elements, 2 vector elements and 2 memory access units |
| Memory interface | 4 x 72-bit DDR4-3200; Support ECC verification |
| Power Management | Support the dynamic shutdown of the clock of the main module; Support dynamic frequency conversion in the main clock domain; Supports dynamic regulation in the main voltage domain |
| Peak computing speed | 560GFlops@2.2GHz |
| Typical power consumption | 150W@2.2GHz |
No chip documents available
Notes
For the general-purpose processor in the server field, 16 high-performance LA464 processor cores are integrated on the chip, using the new LoongArch autonomous command system (LoongArch®), and on the basis of compatibility with the Loongson 3C5000L motherboard design, the package form is adjusted and optimized to maintain the compatibility of the system and application software
No drivers available
Last updated 2025-11-04T13:59:42Z
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