| Specifications | |
|---|---|
| Cache | Each core contains a 64KB private level-1 instruction cache and 64KB private level-1 data cache; Each core contains 256KB of private second-level cache; Total 64MB Level 3 cache |
| Kernel | LA464 cores, 32 pcs |
| Frequency | ≥2.0GHz |
| Other I/O | 1 SPI, 1 UART, 5 I2C, 16 GPIO interfaces |
| High-speed I/O | 1 HyperTransport 3.0 IO interface (DIE0_HT0) |
| Memory interface | Eight x 8-bit DDR72-4, supporting ECC verification |
| Power Management | Support the dynamic shutdown of the clock of the main module; Support dynamic frequency conversion in the main clock domain; Supports dynamic regulation in the main voltage domain |
| Encapsulation method | LGA-4129 |
| Peak computing speed | 1024GFlops@2.0GHz |
| Typical power consumption | 160W@2.0GHz |
The Loongson 3D5000 is a 32-core CPU product for the server market, packaged by two 3C5000 silicon wafers. Loongson 3D5000 integrates 32 LA464 processor cores and 64MB on-chip shared cache, supports 8 memory channels that meet DDR4-3200 specifications, can connect I/O expansion bridges through 5 high-speed HyperTransport interfaces and build single/dual/quad server systems, and the stand-alone system can support up to four 128 cores. Loongson 3D5000 also integrates security and trust module functions on-chip. Loongson 3D5000 adopts LGA-4129 package form, chip size is 75.4mm× 58.5mm×6.5mm, frequency support 2.0GHz or more, typical power consumption 160W, TDP power consumption does not exceed 300W. The measured scores of SPEC CPU2006 Base for single-socket and dual-socket servers exceed 400 and 800 points, respectively, and the SPEC CPU2006 Base score of four-socket servers can reach 1600 points.
Disclaimer
The info found in this page might not be entirely correct. Check out this guide to learn how you can improve it.