Logs
Type| Specifications | |
|---|---|
| Kernel | Single-core 64-bit |
| Frequency | 500MHz~800MHz |
| L2 cache | Share 512KB |
| L1 data cache | 32KB |
| High-speed I/O | PCIE2.0*2、SATA2.0*2、USB3.0 |
| Other interfaces | DVO、PCI、GMAC、USB2.0、NAND、SPI、LPC、LIO、I2C、PRINT、AC97、HDA、UART、SDIO、CAN、PS/2、PWM、GPIO |
| Memory controller | 32-bit DDR2/3-1066 |
| Microarchitecture | Dual emission out-of-order execution LA264 |
| Power Consumption | 1~3W (support dynamic frequency reduction and bucking) |
| L1 instruction cache | 32KB |
No chip documents available
Notes
Loongson 2K0500 is a highly integrated processor chip, mainly for industrial control Internet applications, printing terminals, BMC and other application scenarios. On-chip integrated 64-bit LA264 processor core, 32-bit DDR3 controller, 2D GPU, DVO display interface, two PCIe 2.0, two SATA2.0, four USB2.0, one USB3.0, two GMAC, PCI bus, color black and white printing interface, HDA and other common interfaces. In addition, the chip implements ACPI, DVFS/DPM dynamic power consumption management and other low-power technologies, supports a variety of power levels and wake-up methods, and can control some functions of the chip and high-speed interfaces according to specific application scenarios for dynamic clock and power switch control, to meet the low-power application requirements of industrial control, network security and other applications.
No drivers available
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